This is the Memory Management Module that supports up to 2MB of memory using 8 Banks 8KB each. The design is based on this schematic but is implemented on a CPLD using VHDL. You can change the 74ls575 with any 8bit register. INT_MMU is a signal produced by the Device Select Module when an OUT command is executed. I am using port 0 for this device but you can use any port. One change i made on the VHDL is that i am using the OUT (C),A command, with that you can put data on the B register and that data come out on the A8-A15 bus, and i am using the A13,A14,A15 to pass the bank info from Z80 to CPLD instead of A0-A2 that are shown in this schematic. So i am using only one out port and not 8 like in this shematic on U25.
One more thing, i had trouble with my reset signal, it was very noisy when pressed and created a lot of problems for the CPLD. So i disabled in the VHDL code. If your signal is clean then you should re-enable it.
The pinout on the vhdl code is that of my development board, if you use the gerber files to produce a PCB then you should make a few changes on the pinout, to match it.
Scroll down to download the VHDL code.
So far i have tested this and it works as expected on the “breadboard”, my own CPLD test board. I am using 107 from 160 macrocells so there is some space left to expand this. I will design a RC2014 compatible board to put this CPLD and remove all those cables, result will be posted here. Also i ‘ll design a new board for my 256 kb FLASH memory I.C.s. to have an extra 512 KB memory available. The VHDL enables three I.C.s 32KB each and then two of 256KB. Of course ti’s easy to change this to fit your needs.
This is the test code i used for the MMU Module. I put a message at the start of page 5 and another on page 6. Then i have a print message routine that print only from bank5 (at the start this is page 5). Then by hitting buttons 1 or 2 you can change the pages in bank 5 and by hitting ‘P’ you print the message on bank 5. If all work as expected then you ll se two different messages after each change of page in bank 5. Page 5 is A000h and Page 6 is C000h. My current setup due to lack of extra memory is Banks 0..7 have Pages 0..7, but you can allways put the same page to 2 or more different banks, like in this code.
ORG $8000
INCLUDE ..\MYOS_2_0000.SYM
;TRANSFER MES2 TO PAGE 5
LD HL,MES2
LD DE,$A000
LD BC,14
LDIR
;TRANSFER MES3 TO PAGE 6
LD HL,MES3
LD DE,$C000
LD BC,14
LDIR
AGN: LD HL, MES1
CALL RS_TXT
STRT: CALL GET_CHAR
CP '1'
CALL Z, PG1
CP '2'
CALL Z, PG2
CP '3'
CALL Z, PG3
CP '4'
CALL Z, PG4
CP 'P'
CALL Z, PMSG
CP 'M'
JP Z,4
JP AGN
MES1: DEFM "1 FOR PG1, 2 FOR PG2, P PRINT MESG, M FOR MENU"
DB 13,10,0
MES2: DEFM "I AM PAGE 5"
DB 13,10,0
MES3: DEFM "I AM PAGE 6"
DB 13,10,0
MES4: DEFM "SAME THING"
DB 13,10,0
;PRINT MESSAGE FROM PAGE5
PMSG: LD HL,$A000
CALL RS_TXT
RET
;PUT PAGE 5 TO BANK 5
PG1: LD A,5
LD B,5.SHL.5
LD C,0
OUT (C),A
RET
;PUT PAGE 6 TO BANK 5
PG2: LD A,6
LD B,5.SHL.5
LD C,0
OUT (C),A
RET
;PUT PAGE 5 TO BANK 5
PG3: LD A,5
LD B,5
CALL PUTPGINBANK2
RET
;PUT PAGE 6 TO BANK 5
PG4: LD A,6
LD B,5
CALL PUTPGINBANK2
RET
PUTPGINBANK2: LD C, A ;SAVE PAGE
LD A, B ;BANK IN A
CP 2
RET C ;BANK 0,1 WILL NEVER CHANGE
CP 7
RET Z ;BANK 7 WILL NEVER CHANGE
LD HL, BANKS
LD D, 0
LD E, A
ADD HL, DE
LD A, C ;RESTORE PAGE
LD (HL), A ;SAVE PG IN BANK B MEMORY
LD C, DEVMMU
SLA B ;SHIFT BANK TO A15..A13 FROM A2..A0 WE USE THESE PINS ON THE CPLD FOR BANK INPUT
SLA B
SLA B
SLA B
SLA B ;SET TO A15,A14,A13
OUT (C), A
LD HL,MES4
CALL RS_TXT
RET